From: Robert J. Bradbury (bradbury@aeiveos.com)
Date: Thu Aug 30 2001 - 22:48:10 MDT
Brian Atkins wrote:
> Isn't this the same as the "hyperthreading"/SMT tech Intel has in the
> Pentium 4 (but not enabled yet) ? Max 30% increase in performance I
> hear...
I haven't heard about this and will need to investigate.
> Anyway, it's not big news anymore.
Speaking as someone who has watched computer architectures evolve
over 20 years and who understands the bottlenecks in such architectures
pretty well -- I'd say its "big news" if IBM or Intel has licensed
the TERA patents (pointing out that TERA is the real innovator)
or have bypassed the TERA patents (pointing out how sloppy the
TERA attorneys are or how clever the IBM/Intel attorneys are).
A decade ago nobody realized that it is the CPU-to-memory
bandwidth that is the big problem. Now IBM is building an
entire architecture designed to avoid that. It isn't clear
to me whether Intel is following suit, but they are investing
huge amounts in chip architectures (multi-level caches, multi-ALUs,
etc.) that seem to be oriented towards avoiding solving that problem.
Further there are no indications that they are trying to integrate
the memory with the logic on a single chip (as IBM is doing).
IBM in contrast seems willing to take the hit and develop a process
that supports memory and logic on the same chip. Big difference
in corporate strategies.
INTEL seems to be planning for the 5 year time frame while IBM
seems to be planning for the 10 year time frame.
If IBM has identified the high-growth market and has developed
a better chip and systems architecture to address that market
then the market may divide again into "consumer systems"
and "research systems" where the consumer systems will
be replaced by research systems as they get smaller and more
cost effective.
Robert
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