From: Eugene Leitl (Eugene.Leitl@lrz.uni-muenchen.de)
Date: Sat Dec 28 1996 - 09:25:45 MST
On Thu, 26 Dec 1996, Mark Grant wrote:
> On Wed, 25 Dec 1996, Dejan Vucinic wrote:
>
> > someone said:
> > > Taking this one step further: why not putting the entire microkernel/VM
> > > into a _normal_ on-die SRAM
>
> Does this gain you much? I was under the impression that the microkernel
It depends. On your programming style, e.g. I was argumenting from the
position of tiny grain sizes (WSI constraint), and an asychronous OOP
with high call density, aka threaded code (tiny grains need dense code).
Here nanokernel is virtually indistinguishable from the virtual machine.
SEND_MSG is invoked very often, thus becoming a hot spot. You don't have
resources for a true MMU on such architectures (it would also slow
execution down), so automagical swapping out is not an alternative, anyway.
The kernel space must be protected, of course. But those of the threads
are not, they are protected by being distributed over several nodes.
> only gave you very limited non-portable facilities so that you could
> rapidly port most of your OS by rewriting the microkernel. I can't believe
I would denote this by nanokernel, since several-100-KByte OSses (as Mach)
are also called microkernels. Nanokernels are not portable, they must be
written from scratch. Nanokernels are _less_ portable than the average
UNIX kernel is, anyway. They have been invented for a different reason.
> that all your device drivers fit in 12k. How often is the message-passing
Nanokernels do not contain device drivers. A purely computational node
hasn't got any devices, anyway. Lowest common denominator.
> code called?
I can't give you exact data, but (depending on the programming style) --
very often. I suggest you check out the URLs I posted earlier, there
should be a profiler there, somewhere.
> > >, having an address in address space (cache
> > > has none, it occupies the same address space as the addressable core)?
>
> Some chips let supervisor-mode software lock lines in the cache so that
> they always map to one specific address, effectively allowing you to use
> it as on-chip RAM. I'm fairly sure that the T9000 transputer can do this
Effectively yes, but it is slower, and the machinery is still there --
on-die transistors are not cheap.
T9000 is mythical, anyway.
> (I read the manual a few years ago), but I'm not sure about more common
> chips.
>
ciao,
'gene
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