From: Damien Broderick (d.broderick@english.unimelb.edu.au)
Date: Wed Jan 26 2000 - 22:47:44 MST
>Billy Brown writes:
> > That isn't quite how I read it. My understanding is that they encode the
> > configuration and state information for each FPGA-sized block
If there are any other pig-ignorant clods like me out there, a useful
source of info on these gadgets is
http://www.optimagic.com/faq.html
which sez inter alia:
Most FPGAs do not provide 100% interconnect
between logic blocks (to do so would be prohibitively expensive).
Instead,
sophisticated software places and routes the logic on the device much
like a
PCB autorouter would place and route components.
A generic description of an FPGA is a programmable device with an
internal
array of logic blocks, surrounded by a ring of programmable input/output
blocks, connected together via programmable interconnect. There are a
wide
variety of sub-architectures within this group. The secret to density
and
performance in these devices lies in the logic contained in their
logic blocks and
on the performance and efficiency of their routing architecture.
And here I was guessing that FPGA was some kind of genetic algorithm...
(But this site's description makes it sound as if I was being uncannily
astute in asking about connectivity.)
Damien the clueless but intrepid
This archive was generated by hypermail 2.1.5 : Fri Nov 01 2002 - 15:26:30 MST