hardware : logic : unused pins

What should I do with pins that I am not using?

The safest thing to do is to tie all unused pins to either ground or the positive supply voltage using resistors, and leave them tri-stated (if they are programmable i/o). Anything from about 1K to about 10K will work fine. This way, if the pins get set to an unintended state (due to software bugs or electrical noise or whatever), the chip will not be damaged because the current will be limited by the resistor.

You could get rid of the resistors by just leaving the pins unconnected and set as outputs (high or low), this method is better than just letting the pin float, but this leaves the possibility of the pins floating while the chip is initializing, or in a fault situation in which the pins are tristated unintentionally.

Many low power uC applications involve the chips power cycling, sometimes rapidly. The power loss due to rapid switching of a tri-stated input pin may be significant. Disclamer: I do not have hard data on this, but I believe I'm correct. Rapid switching will not fry the chip, but may decrease battery life when the intention was to extend it.

It also introduces the (low but real) possibility of the pin being shorted to the other supply rail and causing functional failure or damage to the chip or supply.

Many experienced engineers will use this method to (slightly) reduce the cost of a production project AFTER (or in some cases in spite of) verifying that the part

will not be destroyed by a short,
is not supceptable to lockup problems,
can program the unused pins as outputs (not always possible) and
will not operate irratically while booting to the part of the program that initiallizes the pin.

The important thing is to avoid having a tri-stated (input) pin floating, and to avoid having an output pin driven against an external connection so that it exceeds its rated source/sink capability (or the combined source/sink capability of the chip). Pull up or pull down resistors eliminate both possibilities in all conditions. The worst than can happen is accidentally driving an output against a pull up/down and thus wasting power.

Points

Why you should NOT allow unused pins to float. (make output and set low, input tied to ground directly or via a resistor)

Can prevent excessive power dissipation because noise on input can cause the input stage to switch states at high frequency. CMOS dissipates power only when switching from one state to the other.

Tony Nixon says:

A floating input WILL cause erratic chip operation. Maybe not while you force it to, but at some stage it will. I've had chips do all sorts of wierd things, until I eliminated a floating pin (or pins). Some of these chips froze just by placing a finger near them, some won't start, some start but run 'funny'. The worst problem is spending mutitudes of time finding out 'why', when you haven't realised the floating pin is the culprit. As far as I know, the excess currents are caused by input FETS not knowing what to do and the 'hi' and 'lo' ones turning on at the same time causing minute rail to rail shorts, which could be at any frequency. Surely this causes wonderful things to happen inside the die, false triggering the brown out detect etc. - who knows?.
My opinion, is that there is some credibillity in using a moderate value resistor to 'babysit' unused pins. Besides, there is your pin pad for other uses if need be :-)

Why you should always tie unused input pins to GND (best) or VCC

Letting inputs float is not too bad with TTL inputs because they sortof have pullup resistors built in. It's not a good idea with CMOS inputs because there are usually no inherent pull-up or pull-down resistors. The input can float to any voltage, depending upon leakages to ground and the supply. Somewhere (actually, mostly everywhere) in the middle, the CMOS inverter or gate to which the input is connected goes into an indefinite and high power dissipation mode, with both N- and P-channel outputs conducting. This causes extra power dissipation and noise inside the chip.
The short caused by accidentally programming the pin as an output and setting it to the opposite value is not likely to damage the CMOS part. A TTL part will likely fry however, which brings us to the resistor.

Why you should always tie unused input pins to GND (best) or VCC via a resistor (not directly)

might actually be or become an output pin. Many processors can (sometimes accidentally) change inputs to outputs. ESD spikes, brownouts, lightning crashes, screwy things related to general susceptibility, etc...
Accidental grounding or energizing of an output pin (via a dropped pen or paperclip, ill-formed trace, bent component lead, etc...) to the opposite rail may smoke the chip and is far more likely than any other serious error.
reduce coupling of power supply noise to that point in the circuit.
stops gate voltages rising faster than any internal supply rails for any devices that can latch-up and so prevent an occasional failure due to bond wires melting. Latch-up is a danger in chips that have parasitic thyristors as an artifact of the manufacturing process. Most modern chips do not have this problem but its best to be safe
having a resistor on all unused inputs facilitates testing. Even if the gate has no effect on whether the product will work or not, companies like to run the standard test routine for testing each part on their ICT (in-circuit tester), so the ability to drive all inputs to an arbitrary state is needed.
makes temporary changes easier during test and debug as the resistor can be over-ridden easily with out removal.
The cost of the resister is minimal to beginning projects. I have found that the last minute design change or feature addition is the rule rather than the exception. I ALWAYS allocate space to bring out every pin used or not. Getting inexperienced people in the habit of placing that resistor makes them better prepared for the reality of EE life. Experienced production personnel can weight the pros and cons and most likely already have decided what to do. A large value resistor, even left in place, will not prevent the pin from being used if the production boards need a feature added by hand later.
NOTE: Pull down to GND vc pull up to VCC consumes %15 less power on the PIC

Paul B. Webster says:

You should pull down to ground [rather than to Vcc] as:

a short is more likely to occur to ground.
If you have to use the points to connect to an external device, you are more likely to want to reference it to ground.

Mark Willis says:

Usually, on Reset, all I/O pins are set as inputs (Gotcha here - use a pullup or pulldown so your devices don't act in "unpleasant ways" when your chip resets, you want a pull-down if using a logic-level Power FET or an NPN power Darlington or SCR that fires on a logic high input, or a pull-up if using a PNP transistor to do something safety-critical, of course - floating pins are a BAD idea if safety's at stake. This isn't a problem for an indicator LED; if it flashes on power-up, you probably won't notice the 10 microsecond flash <G> On the other hand if you have your ejector seat fire just because of a power glitch in the ejector seat controller you're making, you'll NOT be well liked by the pilot.)

What can happen. Especially in low power sleep modes:

Q: Recently, I had some odd problems with our [PICs] not going into sleep mode--or so it appears. Instead of the usual 30-70 uA of current draw from the battery, I am seeing 1-2 mA. Or what is even more baffling, a drop to sleep followed by a single slow rise to about 600 uA followed by a fall back to normal sleep current.

A: Dwayne Reid (dwayner at planet.eon.net) of Trinity Electronics Systems Ltd, Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax says:

I've had similar problems.
One of them turned out to be the oscillator pins floating. I added a 10M resistor from ocs1 to gnd - problem gone.
The other was an input pin floating - solution was to make it an output during sleep.
Use a high impedance probe and look around while the PIC is asleep - keep an eye on the quiescent current each time you touch something. Even a 10M scope probe will bring an input LO - you might not even see that it was floating if the pin / trace capacitance is really lo. But your quiescent current will plummet if you hit the problem pin.

It might be a good idea to put some code like the following at the beginning of all your projects. This VERY BREIFLY drives the pin and tests the result of that by reading the pin back.

    movlw   TRISB,FSR    ; Point at TRIS register
    bcf    PORTB,x             ; Get ready to drive a low
    bcf    INDF,x                  ; Start the short in this instruction
    movf PORTB,W           ; Get the value
    bsf    INDF,x                 ; Clear the short in this instruction

Simon Nield [simon.nield at QUANTEL.COM] says:

Reading Outputs and Inputs:

might be a good opportunity to make use of the usually irritating lack of a shadow register for the
port states:

; pin0 of port D is either connected to ground, vcc, or open circuit
; if o/c or vcc pin0 is driven high, if connected to ground pin0 is driven low
bsf   PORTD, 0    ; try and pull the pin high
clrw              ; (and wait a bit to let the voltage rise)
xorwf PORTD, F    ; read state of port D and drive it that way
                  ; if pin0 was pulled low it will now be driven low
                  ; if pin0 was floating or high it will now be driven high

...detecting the open circuit state...:

; if pin n port x is pulled high  => result = 0xfe, pin is driven high
; if pin n port x is pulled low   => result = 0x00, pin is driven low
; if pin n port x is open circuit => result = 0xff, pin is driven high
; i.e. bit0 set => open circuit, bits7..1 = pin state
bsf    PORTx, n
clrf   result     ; h:00 o:00 l:00
btfsc  PORTx, n
decf   result, f  ; h:ff o:ff l:00

bcf    PORTx, n
decf   result, f  ; h:fe o:fe l:ff
btfss  PORTx, n
incfsz result, f  ; h:fe o:ff l:00
bsf    PORTx, n   ; set pin high to match state

Q: What do I do with pins I'm not using ? [general design] [FIXME: move to ``What should I do with pins that I am not using ?'' http://www.piclist.com/techref/logic/xtrapins.htm ]

A1: Outputs: don't hook anything to them. (Or pull unused open-collector outputs Hi with a pull-up resistor).

A2: Inputs: Tie to either Hi (Vcc) or Lo (GND). Leaving inputs floating causes problems (oscillations,). Some MCUs have "internal pull ups".

``Inputs circuits (including schmidt trigger) draw considerably more power from the supply when the voltage strays from VDD or GND. Using schmidt inverters with an RC to make an oscillator draws a surprising amount of current, because the input connected to a capacitor is always in the linear range.
I once inherited a design where current consumption was intended to be extremely low (~=60uA), and draw varied by the amount of ambient light falling of the PCB! Ends up, an LED was tied to an open-drain output. When the LED was off (normal), light level hitting the LED would change the voltage across it to the OD output (which was also an input, not unusual in a uP), and take the pin through different areas of the linear region. The solution was to pull-up the pin, so it was at VDD when the LED was off (the LED didn't care).''

-- Bruce Walter

Q2: Well, which is it ? Do I tie them to Hi ? Or do I tie them to Lo ?

A2a: ``Sometimes it does matter, such as a completely unused flip-flop, where you would not want to tie both the reset and set inputs to their active level ... which could cause ... upset the performance of the other FFs in the same package.'' -- Jon Elson

A2b: CMOS inputs: ``whatever may make the PCB layout easiest (annotate to SCH), or makes using the input later (with a wire?) easier.'' -- Bruce Walter

``For example, if I am routing traces for a 74HC14 hex inverter, and I don't use 5 of the inverters, I tie the inputs of the unused gates on the pin 1 side of the chip to GND, and the inputs of unused gates on the pin 14 side of the chip to VCC. The way I route my power buses, the GND track is under the pin 1 side of the chip, and the VCC is under the pin 14 side of the chip. Electrically, there is no reason I know of to choose VCC over GND for CMOS inputs. ... This is what I do for double-sided boards. Of course, this advice is moot for boards with VCC and GND planes, since VCC and GND are equally accessible.'' -- Ivan Baggett http://www.bagotronix.com

``Actually, I have sometimes daisy chained unused sections of a HC14 or HC04 since the pins in question are adjacent and the lengths of the nets are minimized. The first in the chain connects to the nearest of Vcc and GND. If I recall correctly, TTL gates required a series resistor (I don't know why), LSTTL did not but both had to be pulled high because when pulled low they sourced appreciable current. Since CMOS the input behaviour has been independent of the input logic state. If you want to be able to use a spare gate or inverter in modifying a board, you could perhaps just make sure that the track to the input can be cut readily. If you daisy chain sections you can readily pull off a non-inverting buffer from 2 spare sections by just cutting the track to the second last inverter in the chain.'' -- Robert Mitchell

A2c: TTL inputs: Tie high. Use a 1 KOhm pull-up resistor. ``so that if the +5 V power supply goes to an abnormally high voltage, the chip may survive up to 7 Volts or so. Without the resistor, the input protection network would pop at about 5.5 V.'' -- Jon Elson

Inside the chip, TTL inputs ``are biased high, so connecting to VCC will give slightly less current draw.'' (but still much more current than CMOS) -- Ivan Baggett

``A grounded TTL input will sink 1.6 mA out of each input! That can add up quick on battery powered or other low power equipment. Of course, they DON'T use that stuff in battery powered gear anymore.'' -- Jon Elson

From: David Cary ... "Mike Reagan" on 2001-03-29 06:07:13 AM mentioned >Look at the low level schematic provided by the Mfg for their integrated >circuit. This is always good advice. Now that the top IC suppliers have put their databooks online, it's very easy to get this information. Logic ICs http://www-us.semiconductors.philips.com/handbook/handbook_45.html http://www.onsemi.com/pub/prod/0,1824,productsm_Documentation_DocType=DataBook_LevelName1=DL121,00.html http://www.onsemi.com/pub/prod/0,1824,productsm_Documentation_DocType=DataBook_LevelName1=DL129,00.html Allow me to quote from http://www-us.semiconductors.philips.com/acrobat/various/HCT_USER_GUIDE.pdf (which has some really low-level detail -- the shapes of the ``n'' and ``p'' regions in the silicon, which pins are pulled high or low for testing, etc.)

7.4 Termination of unused inputs To prevent any possibility of linear operation of the input circuitry of an LSTTL device, it is good practice to terminate all unused LSTTL inputs to VCC via a 1.2 kOhm resistor. Inputs should not be connected directly to GND or VCC , and they should not be left floating. Unlike LSTTL inputs, the impedance of 74HC and 74HCT inputs is very high and unused inputs must be terminated to prevent the input circuitry floating into the linear mode of operation which would increase the power dissipation and could cause oscillation. Unused 74HC and 74HCT inputs should be connected to VCC or GND, either directly (a distinct advantage over LSTTL), or via resistors of between 1 kOhm and 1 MOhm. Since the resistors used to terminate the inputs of LSTTL devices are usually between 220 Ohm and 1.2 kOhm, it is often possible to directly replace LSTTL circuits with their 74HCT counterparts. Some of the bidirectional (transceiver) logic devices in the HCMOS family have common I/O pins. These pins cannot be connected directly to VCC or GND. Instead, when defined as inputs, they should be connected via a 10 kOhm resistor to VCC or GND.

On the other hand, AN2022: integrated bus hold circuits http://www-us.semiconductors.philips.com/acrobat/applicationnotes/AN2022.pdf starts out with "The problem with floating or unused CMOS inputs ..." and explains how a few specialized ICs are designed with "bus hold circuits" so it's OK to let their inputs float. -- David Cary

Questions:

yoonjli@utdallas.edu asks:
Should I pull-up or down unused output pins? Is it OK to pull-up or down the unused output pins if I use the large value resistor as a weak pull-up or down? Your recommendation on bidirectional pins?(like open collector/drain?) Thanks, Yoon
J.M.Hollingsworth@btinternet.com asks: " Please could you Explain how false triggering can occur with thyristors and describe a method of turning off a thyrister using DC commutation"

General IO Information